mirror of
https://github.com/LadybirdBrowser/ladybird
synced 2026-05-01 12:07:14 +02:00
31606fddd3
Add Mov2 and Mov3 bytecode instructions that perform 2 or 3 register moves in a single dispatch. A peephole optimization pass during bytecode assembly merges consecutive Mov instructions within each basic block into these combined instructions. When merging, identical Movs are deduplicated (e.g. two identical Movs become a single Mov, not a Mov2). This optimization is implemented in both the C++ and Rust codegen pipelines. The goal is to reduce the per-instruction dispatch overhead, which is significant compared to the actual cost of moving a value. This isn't fancy or elegant, but provides a real speed-up on many workloads. As an example, Kraken/imaging-desaturate.js improves by ~1.07x on my laptop.
29 lines
1.4 KiB
Plaintext
29 lines
1.4 KiB
Plaintext
JS bytecode executable ""
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[ 0] 0: GetLexicalEnvironment dst:reg4
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[ 8] GetGlobal dst:reg6, identifier:f
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[ 20] Call dst:reg5, callee:reg6, this_value:Undefined, f, arguments:[Int32(1), Int32(2), Int32(3)]
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[ 50] End value:reg5
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JS bytecode executable "f"
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[ 0] 0: GetLexicalEnvironment dst:reg4
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[ 8] CreateVariable identifier:a, is_immutable:false, is_global:false, is_strict:false
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[ 18] CreateVariable identifier:b, is_immutable:false, is_global:false, is_strict:false
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[ 28] CreateVariable identifier:c, is_immutable:false, is_global:false, is_strict:false
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[ 38] InitializeLexicalBinding identifier:a, src:arg0
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[ 50] InitializeLexicalBinding identifier:b, src:arg1
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[ 68] InitializeLexicalBinding identifier:c, src:arg2
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[ 80] Mov dst:inner~0, src:Undefined
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[ 90] NewFunction dst:reg5, shared_function_data_index:0, lhs_name:inner
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[ a8] Mov2 dst1:inner~0, src1:reg5, dst2:reg6, src2:inner~0
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[ c0] Call dst:reg5, callee:reg6, this_value:Undefined, inner
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[ e0] Return value:reg5
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JS bytecode executable "inner"
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[ 0] 0: GetLexicalEnvironment dst:reg4
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[ 8] GetBinding dst:reg5, identifier:a
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[ 20] GetBinding dst:reg6, identifier:b
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[ 38] Add dst:reg7, lhs:reg5, rhs:reg6
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[ 48] GetBinding dst:reg5, identifier:c
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[ 60] Add dst:reg6, lhs:reg7, rhs:reg5
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[ 70] Return value:reg6
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