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fcbbc6a4b8
Teach AsmIntGen about store_pair32 and store_pair64 so hot handlers can describe adjacent writes just as explicitly as adjacent reads. The DSL now requires naming both memory operands and rejects non-adjacent or reordered pairs at code generation time. On aarch64 the new instructions lower to stp when the address is encodable, while x86_64 keeps the same semantics with two scalar stores. The shared validation keeps the paired access rules consistent across both load and store primitives.