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GP-0: Fixed ARM disassembly test regressions

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This commit is contained in:
Dan
2026-03-24 17:51:27 +00:00
committed by ghidorahrex
parent 07f43cfe80
commit 84fb9e72f8
5 changed files with 40 additions and 11 deletions
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4
Ghidra/Processors/ARM/data/languages/ARMTHUMBinstructions.sinc
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@@ -518,12 +518,12 @@ thBitWidth: "#"^w is imm3_shft & imm2_shft & thc0004 [ w = thc0004 - ((imm3_shft
thAddrShift:[Rn0003,Rm0003] is Rn0003; thc0405=0 & Rm0003 {
local addr = Rn0003 + Rm0003;
export *:4 addr;
export addr;
}
thAddrShift: [Rn0003,Rm0003,"lsl #"^thc0405] is Rn0003; thc0405 & Rm0003 {
local addr = Rn0003 + (Rm0003 << thc0405);
export *:4 addr;
export addr;
}
#####################

8
Ghidra/Processors/ARM/data/languages/ARMinstructions.sinc
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@@ -2413,7 +2413,7 @@ ArmPCRelImmed12: reloff is U23=0 & immed & rotate
:blx HAddr24 is $(AMODE) & CALLoverride=0 & ARMcond=0 & cond=15 & c2527=5 & H24=0 & HAddr24
{
lr = inst_next;
SetThumbMode(1); # TMode done by HAddr24's globalset
TB = 1; # TMode done by HAddr24's globalset, no need to invoke SetThumbMode(), since static
call HAddr24;
# don't do causes decompiler trouble TB = 0;
} # Always changes to THUMB mode
@@ -2421,7 +2421,7 @@ ArmPCRelImmed12: reloff is U23=0 & immed & rotate
:blx HAddr24 is $(AMODE) & CALLoverride=1 & ARMcond=0 & cond=15 & c2527=5 & H24=0 & HAddr24
{
lr = inst_next;
SetThumbMode(1); # TMode done by HAddr24's globalset
TB = 1; # TMode done by HAddr24's globalset, no need to invoke SetThumbMode(), since static
goto HAddr24;
} # Always changes to THUMB mode
@@ -2429,7 +2429,7 @@ ArmPCRelImmed12: reloff is U23=0 & immed & rotate
:blx HAddr24 is $(AMODE) & ARMcond=0 & CALLoverride=0 & cond=15 & c2527=5 & H24=1 & HAddr24
{
lr = inst_next;
SetThumbMode(1); # TMode done by HAddr24's globalset
TB = 1; # TMode done by HAddr24's globalset, no need to invoke SetThumbMode(), since static
call HAddr24;
# don't do causes decompiler trouble TB = 0;
} # Always changes to THUMB mode
@@ -2437,7 +2437,7 @@ ArmPCRelImmed12: reloff is U23=0 & immed & rotate
:blx HAddr24 is $(AMODE) & ARMcond=0 & CALLoverride=1 & cond=15 & c2527=5 & H24=1 & HAddr24
{
lr = inst_next;
SetThumbMode(1); # TMode done by HAddr24's globalset
TB = 1; # TMode done by HAddr24's globalset, no need to invoke SetThumbMode(), since static
goto HAddr24;
} # Always changes to THUMB mode

33
Ghidra/Processors/ARM/src/main/java/ghidra/program/emulation/ArmPcodeUseropLibraryFactory.java
View File

@@ -19,9 +19,12 @@ import java.math.BigInteger;
import ghidra.app.plugin.processors.sleigh.SleighLanguage;
import ghidra.pcode.emu.DefaultPcodeThread.PcodeThreadExecutor;
import ghidra.pcode.error.LowlevelError;
import ghidra.pcode.exec.*;
import ghidra.pcode.exec.PcodeUseropLibraryFactory.UseropLibrary;
import ghidra.program.model.lang.*;
import ghidra.program.model.lang.Register;
import ghidra.program.model.lang.RegisterValue;
import ghidra.program.model.pcode.Varnode;
import ghidra.util.Msg;
@UseropLibrary("arm")
@@ -39,7 +42,7 @@ public class ArmPcodeUseropLibraryFactory implements PcodeUseropLibraryFactory {
// LATER: This should probably be injected
private final ArmCpuState cpuState = new ArmCpuState();
public ArmPcodeUseropLibrary(Language language) {
public ArmPcodeUseropLibrary(SleighLanguage language) {
Register tModeReg = language.getRegister("TMode");
if (tModeReg != null) {
tMode = new RegisterValue(tModeReg, BigInteger.ONE);
@@ -49,6 +52,32 @@ public class ArmPcodeUseropLibraryFactory implements PcodeUseropLibraryFactory {
tMode = null;
aMode = null;
}
SleighPcodeUseropDefinition.Factory factory =
new SleighPcodeUseropDefinition.Factory(language);
putOp(factory.define("VectorSignedToFloat")
.params("s", "mode")
.body(args -> switch (args.get(0).getSize()) {
case 4 -> "__op_output = int2float(s);";
default -> throw new LowlevelError(
"VectorSignedToFloat: invalid dest size of " + args.get(0).getSize());
})
.build());
putOp(factory.define("VectorUnsignedToFloat")
.params("s", "mode")
.body(args -> switch (args.get(0).getSize()) {
case 4 -> {
Varnode s = args.get(1);
yield """
temp:%d = zext(s);
__op_output = int2float(s);
""".formatted(s.getSize() + 1);
}
default -> throw new LowlevelError(
"VectorSignedToFloat: invalid dest size of " + args.get(0).getSize());
})
.build());
}
@PcodeUserop(modifiesContext = true)

2
Ghidra/Processors/Hexagon/src/main/java/ghidra/program/emulation/HexagonPcodeUseropLibraryFactory.java
View File

@@ -104,7 +104,7 @@ public class HexagonPcodeUseropLibraryFactory implements PcodeUseropLibraryFacto
case 4 -> "__op_output = __isClassifiedFloat32(bits, cls);";
case 8 -> "__op_output = __isClassifiedFloat64(bits, cls);";
default -> throw new LowlevelError(
"isClassifiedFloat: invalid float size of " + args.get(0).getSize());
"isClassifiedFloat: invalid float size of " + args.get(1).getSize());
})
.build());
}

4
Ghidra/Test/IntegrationTest/src/test.slow/java/ghidra/pcode/emu/jit/gen/ArmJitCodeGeneratorTest.java
View File

@@ -122,8 +122,8 @@ public class ArmJitCodeGeneratorTest extends AbstractJitCodeGeneratorTest {
""", Map.ofEntries(
Map.entry(0x00400000L, """
if (!ZR) goto <skip>;
ISAModeSwitch = 1;
setISAMode(ISAModeSwitch);
TB = 1;
setISAMode(TB);
<skip>
emu_exec_decoded();
""")));